A Transformerless Boost-Modified Cuk Combined Single-Switch DC-DC Converter Topology with Enhanced Voltage Gain

Abstract

Recently, the research is towards the development of high static gain DC-DC converters suitable for renewable energy applications. The high voltage gain can be achieved using isolated and non-isolated configurations of the converter. The magnetically coupled inductor based isolated DC-DC converter structures can have improved voltage gain, but they need large size inductors which may lead to increased cost. Thus, the modified structures of non-isolated conventional boost, CUK, and SEPIC topologies with inclusion of additional controlled and uncontrolled switches along with large number of passive components are employed to achieve the improved voltage gain. However, it leads to increased complexity and control. Hence, the researchers concentrated on development of hybrid non-isolated DC-DC converter topologies capable of achieving enhanced static voltage gain, without adding extra controlled switches and passive elements. In this paper, a hybrid non-isolated single-switch DC-DC converter structure is proposed for achieving high voltage gain than that of traditional non-isolated topologies. The proposed hybrid structure operating in continuous inductor current mode is obtained by connecting the conventional boost and the modified CUK converters in parallel. The power switch and the diodes have low voltage-current stress. The operation of the proposed hybrid topology during various modes is explored. The mathematical modeling of the proposed converter is also provided. The MATLAB / SIMULINK study of the suggested hybrid converter has been implemented. The digital simulation study proves the feasibility of the proposed hybrid converter concept and its steady-state behavior.

Keywords:
boost converter; continuous inductor current mode; Cuk topology; duty ratio; hybrid DC-DC converter topology; MATLAB/SIMULINK; static voltage gain; voltage-current stress.

HIGHLIGHTS

• Single-switch configuration for the proposed hybrid converter is employed.

• Static voltage gain of the proposed hybrid topology is improved.

• Power switch is subjected to low voltage-current stress.

• The power conversion efficiency of the proposed converter is improved.

INTRODUCTION

In recent times, the commercial, industrial, and domestic consumers of electricity require increased energy demand globally. Both the conventional and non-conventional energy sources are available to meet out the increased energy demand. The use of highly expensive conventional fossil fuels for electrical energy generation results in pollution of environment globally and rapid increase of global average surface temperature [¹,²]. These issues can be tackled by using non-conventional energy sources that are renewable, cost-effective and pollution-free. However, the individual performance of the renewable energy sources (RES) for independent electricity generation is lacking due to their intermittent nature [³]. This issue can be solved using hybrid renewable energy systems (HRES) where two or more renewable energy sources are integrated for high quality power generation [⁴]. The DC output voltage delivered by RES will be fluctuating due to the intermittent nature of the sources. It is therefore necessary to get the stabilized voltage output from the HRES, by means of DC-DC power electronic converters [⁵]. The predominant role of the DC-DC converters is to achieve high voltage gain and to improve the efficiency of the renewable energy generation system. The HRES can supply power to DC loads through a DC-DC converter, and AC loads are fed through a DC-DC converter and an inverter [⁶]. The overall performance of the grid-tied HRES is influenced by the appropriate selection of an efficient and high gain DC-DC converter topology.

The DC-DC conversion topologies are categorized into isolated and non-isolated structures respectively. The input and output sides of the isolated converter structures are galvanically isolated using a high frequency transformer. The advantages of the isolated converter topologies include high step-up gain with appropriate duty ratio, no effect of the input on the output port due to a common ground, stable output over a wide range of inputs, isolation, and high power conversion efficiency [⁷-¹⁰]. But, the isolated topologies suffer from the drawbacks such as high voltage spikes occurring across the power switches due to the effect of leakage inductance of the transformer, saturation of magnetic core, thermal effect, control complexity, multistage power conversion process, and increased size and cost of the converter. Hence, the efficient non-isolated high static voltage gain DC-DC converter configurations are opted for renewable energy applications [¹¹].

The traditional simple structured and pulse width modulated non-isolated boost, SEPIC, CUK, and ZETA converter topologies can achieve very high voltage gain if the power switches are operated at maximum value of duty ratios [¹²]. The shortcomings of these traditional single switch topologies include low power conversion efficiency and increased stress across the switching components. The single switch non-isolated converter topologies are modified by adding extra diodes and passive elements in order to improve the voltage gain [¹³-¹⁹]. The researchers have also developed non-isolated topologies with extra power switches, diodes and passive components for enhanced static voltage gain [²⁰,²¹]. The use of more number of switching and passive devices in the non-isolated topologies proposed in [¹³-²¹] leads to the complexity of the power circuit and the control strategy. Hence, the researchers concentrated on developing the hybrid non-isolated single switch DC-DC converter topologies with simple control strategy, high voltage gain capability and high power conversion efficiency [²²-²⁴].

In this paper, a hybrid non-isolated single switch high step-up DC-DC converter structure suitable for renewable energy applications is proposed. The hybrid topology employs the parallel combination of traditional boost and modified CUK DC-DC converters [¹⁷,¹⁸]. The proposed hybrid positive output converter with single power switch is operated in continuous inductor current mode. The power switch and the diodes are subjected to low stress. The output voltage (V₀) is obtained as the sum of the voltages appearing across the two series-connected capacitors that are connected in shunt with the proposed converter circuit. The voltage gain of the suggested hybrid converter is greater than that of the other non-isolated topologies [¹⁷,¹⁸,²²].

The remaining part of the paper is structured as follows: The various modes of operation, steady state behavior, mathematical modelling, simulation results and discussion for the proposed hybrid converter are well explained sequentially in subsequent Sections. The conclusion section concludes the features of the proposed research work.

MODES OF OPERATION OF THE PROPOSED CONVERTER

The configurations of conventional boost DC-DC converter and the modified CUK DC-DC converter are shown in Figure 1(a) and 1(b) [¹⁷,¹⁸]. The proposed non-isolated hybrid single switch DC-DC converter structure shown in Figure 1(c) is developed by merging the converter topologies shown in Figure 1(a) and 1(b) in such a way that the power switch (S) and the inductor (L₁) are kept commonly on the input side and the rest of the CUK circuit components are connected across the terminals ‘a’ and ‘b’ of the conventional boost converter. The load voltage (V₀) is obtained as the sum of voltages across the capacitors C₁ and C₄. The proposed hybrid topology exhibits improved voltage gain than that of the topologies shown in Figure 1(a), Figure 1(b), and in [²¹]. Also, the low voltage stress occurs on the power switch and the diodes. The proposed hybrid single switch converter structure with all active and passive components as ideal is operated in three modes with continuous inductor current. The theoretical waveforms of the converter are shown in Figure 3.

Figure 1
Configurations of DC-DC converter. (a). Conventional Boost converter, (b). Modified CUK converter, (c). Proposed hybrid single switch converter

Mode-I operation (t₀<t<t₁):

During the time interval t₀ - t₁, the proposed converter operates under Mode-I as shown in Figure 2(a). The power switch S is made to conduct during this interval. The diode D₃ gets forward biased and the remaining diodes D₁, D₂, and D₄ get reverse biased. The inductor L₁ is charged to the source voltage (V_in). The capacitor C₂ discharges and hence charges the capacitor C₃, the capacitor C₄, the inductor L₂, and the capacitor C₅ respectively through two paths: (i). C₂-a-S-b-C₃-D₃-C₂, and (ii). C₂-a-S-b-C₄-L₂-C₅-C₂. The load R₀ receives the current (I₀) and hence the voltage (V₀) due to the discharge of the capacitor C₁. The following Equation (1) is written for the inductors and capacitors.

(1) $$V_{L1}=V_{in};V_{L2}=V_{C2}-V_{C4}-V_{C5};V_{C2}=V_{C3}$$

where, V_L1, V_L2 are the voltages across the inductors L₁ and L₂; V_in is input DC voltage.

V_C2, V_C3, V_C4, & V_C5 represent respectively the voltages across the capacitors C₂, C₃, C₄, & C₅.

Mode-II operation (t₁<t<t₂):

During the time interval t₁ - t₂, the proposed converter operates under Mode-II as shown in Figure 2(b). The power switch S is turned OFF during this interval. The diodes D₂ and D₄ get forward biased. The diodes D₁ and D₃ get reverse biased. The inductor L₁ discharges and hence charges the capacitor C₂ through the path L₁-a-C₂-D₂-V_in-L₁. The passive components L₂, C₃, C₄, and C₅ discharge following the two paths: (i). L₂-C₅-D₂-b-C₄-L₂, and (ii). L₂-D₄-C₃-C₄-L₂. The load current (I₀) is supplied from the capacitor C₁. The following Equation (2) is written for the inductors L₁ and L₂.

(2) $$V_{L1}=V_{in}-V_{C2};V_{L2}=-V_{C4}-V_{C5}=V_{C3}-V_{C4}$$

Mode-III operation (t₂<t<t₃):

During the time interval t₂ - t₃, the proposed converter operates under Mode-III as shown in Figure 2(c). The power switch S continues to remain in the switched OFF condition. The diode D₁ starts to conduct. The diodes D₂ and D₄ remain conducting. The diode D₃ remains reverse biased. The capacitors C₁ and C₂ are charged by the inductor L₁. The load R₀ receives power from the source V_in. The same Equation (2) is written for this Mode-III too in addition to the following equation (3) for the voltage V_C1 across the capacitor C₁.

(3) $$V_{C1}=V_{C2}$$

The Equations (1), (2), & (3) for V_C2, V_L2, & V_C1 give rise to the following Equation (4).

(4) $$V_{C1}=V_{C2}=V_{C3}=-V_{C5}$$

Figure 2
Modes of operation of the proposed DC-DC converter. (a). Mode-I (b). Mode-II (c). Mode-III

Figure 3
Theoretical waveforms of the proposed converter

STEADY STATE BEHAVIOUR OF THE PROPOSED CONVERTER:

For the conventional boost converter [¹⁷] and the modified CUK converter [¹⁸] topologies shown in Figure 1(a) and 1(b), with duty ratio ‘k’ for the power switch, the voltage gain equations are represented as given below:

(5) $$\text{Voltage gain (G) for the conventional boost converter}=\frac{V_0}{V_{in}}=\frac{1}{1-k}$$

(6) $$\text{Magnitude of Voltage gain (G) for the modified CUK converter}=\frac{V_0}{V_{in}}=\frac{1+k}{1-k}$$

For the proposed hybrid DC-DC converter topology, the voltage gain equation is derived using the Equations (1), (2), and (4). The volt-second balance principle is applied to the identical inductors L₁ and L₂ and the following Equations are obtained.

(7) $$V_{in}k{T}_s+(V_{in}-V_{C2})(1-k)T_s=0$$

(8) $$(V_{C2}-V_{C4}-V_{C5})k{T}_s+(V_{C3}-V_{C4})(1-k)T_s=0$$

From the Equations (4) and (7), the expression for the voltage V_C1 across the capacitor C₁ is obtained.

(9) $$V_{C1}=V_{C2}=V_{C3}=-V_{C5}=\frac{V_{in}}{1-k}$$

From the Equation (8), the expression for the voltage V_C4 across the capacitor C₄ is obtained.

(10) $$V_{C4}=\left(\frac{1+k}{1-k}\right)V_{in}$$

The load voltage (V₀) is the sum of the capacitor voltages V_C1 and V_C4.

(11) $$V_0=V_{C1}+V_{C4}=\left(\frac{2+k}{1-k}\right)V_{in}$$

The voltage gain (G) of the proposed hybrid single switch DC-DC converter is obtained as:

(12) $$G=\frac{V_0}{V_{in}}=\frac{2+k}{1-k}$$

The comparison of the voltage gain (G) of the conventional boost converter [¹⁷], modified CUK converter [¹⁸], hybrid boost and CUK converter [²²], and the proposed hybrid single switch DC-DC converter is given in Figure 4. Thus, the proposed hybrid structure provides the improved voltage gain compared to the other topologies. Moreover, the stress on the power switch is found to be low.

Figure 4
Variation of voltage gain (G) of the DC-DC converters with respect to the Duty ratio (k).

By equating the proposed converter input power and output power, the steady state input inductor current I_L1 is derived as shown below:

(13) $$V_{in}{I}_{L1}=V_0{I}_0;I_{L1}=\frac{V_0{I}_0}{V_{in}}=\left(\frac{2+k}{1-k}\right)I_0$$

The steady state value of the inductor current I_L2 is obtained by equating the average value of current through the capacitor C₄ to zero during the total switching time period T.

(14) $$I_{C4}=\frac{1}{T}\left({\displaystyle \underset{0}{\overset{kT}{\int }}(I_{L2}-I_0)dt+{\displaystyle \underset{kT}{\overset{T}{\int }}(I_{L2}-I_0)dt}}\right)=0$$

From the above equation, I_L2 is derived as:

(15) $$I_{L2}=I_0$$

The steady state value of the diode current I_D1 is obtained by equating the average value of current through the capacitor C₁ to zero during the total switching time period T.

(16) $$I_{C1}=\frac{1}{T}\left({\displaystyle \underset{0}{\overset{kT}{\int }}(-I_0)dt+{\displaystyle \underset{kT}{\overset{T}{\int }}(I_{D1}-I_0)dt}}\right)=0$$

From the above equation, I_D1 is obtained as:

(17) $$I_{D1}=\frac{I_0}{(1-k)}$$

The steady state value of the diode current I_D2 is obtained by equating the average value of current through the capacitor C₂ to zero during the total switching time period T.

(18) $$I_{C2}=\frac{1}{T}\left({\displaystyle \underset{0}{\overset{kT}{\int }}-(I_{L2}+I_{C3})dt+{\displaystyle \underset{kT}{\overset{T}{\int }}(I_{D2}-I_{L2}+I_{C3})dt}}\right)=0$$

In the above equation, the average value of current through the capacitor C₃ is zero during the total switching time period T. Hence, I_D2 is obtained as:

(19) $$I_{D2}=\frac{I_0}{(1-k)}$$

The steady state value of the diode current I_D4 is obtained by equating the average value of current through the capacitor C₅ to zero during the total switching time period T.

$$I_{C5}=\frac{1}{T}\left({\displaystyle \underset{0}{\overset{kT}{\int }}{I}_{L2}dt+{\displaystyle \underset{kT}{\overset{T}{\int }}(I_{L2}-I_{D4})dt}}\right)=0$$

From the above equation, I_D4 is obtained as:

(20) $$I_{D4}=\frac{I_0}{(1-k)}$$

The steady state value of the diode current I_D3 is obtained by equating the average value of current through the capacitor C₂ to zero during the total switching time period T.

(21) $$I_{C2}=\frac{1}{T}\left({\displaystyle \underset{0}{\overset{kT}{\int }}-(I_{L2}+I_{D3})dt+{\displaystyle \underset{kT}{\overset{T}{\int }}(I_{D2}-I_{L2}+I_{D4})dt}}\right)=0$$

From the above equation, I_D3 is obtained as:

(22) $$I_{D3}=\frac{I_0}{k}$$

The voltage stress across the diodes D₁, D₂, D₃, & D₄ are obtained as:

(23) $$\left.\begin{array}{c}{V}_{D1}=V_{C2}-V_{C1}-V_{C3}=V_{in}\left(\frac{1}{1-k}-\frac{1}{1-k}-\frac{1}{1-k}\right)=-\frac{V_{in}}{(1-k)}\\ V_{D2}=-V_{C2}=-\frac{V_{in}}{(1-k)};V_{D3}=-V_{C3}=-\frac{V_{in}}{(1-k)};V_{D4}=V_{C5}=-\frac{V_{in}}{(1-k)}\end{array}\right\}$$

The expressions for the voltage stress (V_S) and current stress (I_S) of the power switch ‘S’ are obtained as:

(24) $$V_S=V_{C2}=\frac{V_{in}}{(1-k)}$$

(25) $$I_S=I_{L1}-I_{C2}=I_{L1}-(-(I_{L2}+I_{C3}))$$

In the above expression, I_C3 = 0. Hence, the current stress I_S is obtained as:

(26) $$I_S=\left(\frac{3}{1-k}\right)I_0$$

The steady state values of voltages and currents for the various circuit components are verified for k = 0.8, V_in = 24V, and $$I_0=\frac{P_0}{V_0}$$ = $$\frac{320}{335}$$ = 1 A as shown below using the equations (9), (10), (11), (13), (15), (17), (19), (20), (22), (23), & (25) respectively.

$$V_{C1}=V_{C2}=V_{C3}=-V_{C5}=\frac{V_{in}}{1-k}=\frac{24}{1-0.8}=120V;V_{C4}=\left(\frac{1+k}{1-k}\right)V_{in}=\frac{24\times 1.8}{0.2}=216V;$$

$$V_0=\left(\frac{2+k}{1-k}\right)V_{in}=\frac{2.8\times 24}{0.2}=336V;I_{L1}=I_{in}=\left(\frac{2+k}{1-k}\right)I_0=\frac{2.8\times 1}{0.2}=14A;I_{L2}=I_0=1A;$$

$$I_{D1}=I_{D2}=I_{D4}=\frac{I_0}{(1-k)}=\frac{1}{0.2}=5A;I_{D3}=\frac{I_o}{k}=\frac{1}{0.8}=1.25A;$$

$$V_S=V_{C2}=\frac{V_{in}}{(1-k)}=120V;I_S=\left(\frac{3}{1-k}\right)I_0=\frac{3\times 1}{0.2}=15A.$$

$$V_{D1}=V_{D2}=V_{D3}=V_{D4}=-\frac{V_{in}}{(1-k)}=-\frac{24}{(1-0.8)}=-120V;$$

MATHEMATICAL MODELLING OF THE PROPOSED HYBRID DC-DC CONVERTER

The state space averaging model of the proposed hybrid single-switch DC-DC converter is derived in this section. During mode-I operation, the switch ‘S’ is turned ON. The dynamic equations are written as shown below:

(27) $$\left.\begin{array}{l}\frac{d{i}_{L1}}{dt}=\frac{V_{in}}{L_1};\frac{d{i}_{L2}}{dt}=\frac{V_{C2}}{L_2}-\frac{V_{C4}}{L_2}-\frac{V_{C5}}{L_2};\frac{d{V}_{C1}}{dt}=-\frac{V_0}{R_0{C}_1}=-\frac{(V_{C1}+V_{C4})}{R_0{C}_1}\\ \frac{d{V}_{C2}}{dt}=\frac{d{V}_{C3}}{dt}=-\frac{i_{L2}}{(C_2-C_3)};\frac{d{V}_{C5}}{dt}=\frac{i_{L2}}{C_5}\\ y=V_0=V_{C1}+V_{C4}\end{array}\right\}$$

The above equations are written in state space form during ON period of the switch as shown below:

(28) $$\left[\stackrel{•}{x}\right]=A_{1}x+B_{1}u;y=C_{1}x+D_{1}u$$

Where, $$\left[\stackrel{•}{x}\right]={\left[\begin{array}{ccccccc}\stackrel{•}{i_{L1}}& \stackrel{•}{i_{L2}}& \stackrel{•}{V_{C1}}& \stackrel{•}{V_{C2}}& \stackrel{•}{V_{C3}}& \stackrel{•}{V_{C4}}& \stackrel{•}{V_{C5}}\end{array}\right]}^T$$; $$\left[x\right]={\left[\begin{array}{ccccccc}{i}_{L1}& i_{L2}& V_{C1}& V_{C2}& V_{C3}& V_{C4}& V_{C5}\end{array}\right]}^T$$

$$\left[A_1\right]=\left[\begin{array}{ccccccc}0& 0& 0& 0& 0& 0& 0\\ 0& 0& 0& \frac{1}{L_2}& 0& -\frac{1}{L_2}& -\frac{1}{L_2}\\ 0& 0& -\frac{1}{R_0{C}_1}& 0& 0& -\frac{1}{R_0{C}_1}& 0\\ 0& -\frac{1}{(C_2-C_3)}& 0& 0& 0& 0& 0\\ 0& -\frac{1}{(C_2-C_3)}& 0& 0& 0& 0& 0\\ 0& \frac{1}{C_4}& -\frac{1}{R_0{C}_4}& 0& 0& -\frac{1}{R_0{C}_4}& 0\\ 0& \frac{1}{C_5}& 0& 0& 0& 0& 0\end{array}\right];$$

$$\left[B_1\right]={\left[\begin{array}{ccccccc}\frac{1}{L_1}& 0& 0& 0& 0& 0& 0\end{array}\right]}^T;\left[u\right]=V_{in};\left[C_1\right]=\left[\begin{array}{ccccccc}0& 0& 1& 0& 0& 1& 0\end{array}\right];\left[D_1\right]=\left[0\right]$$

During mode-II operation of the converter, the switch ‘S’ is turned OFF. During this period, the following state space model is derived.

(29) $$\left[\stackrel{•}{x}\right]=A_{2}x+B_{2}u;y=C_{2}x+D_{2}u$$

$$\left[A_2\right]=\left[\begin{array}{ccccccc}0& 0& 0& -\frac{1}{L_1}& 0& 0& 0\\ 0& 0& 0& 0& \frac{1}{L_2}& -\frac{1}{L_2}& 0\\ 0& 0& -\frac{1}{R_0{C}_1}& 0& 0& -\frac{1}{R_0{C}_1}& 0\\ \frac{1}{C_2}& 0& 0& 0& 0& 0& 0\\ 0& \frac{1}{(C_3+C_5)}& 0& 0& 0& 0& 0\\ 0& \frac{1}{C_4}& -\frac{1}{R_0{C}_4}& 0& 0& -\frac{1}{R_0{C}_4}& 0\\ 0& \frac{1}{(C_3+C_5)}& 0& 0& 0& 0& 0\end{array}\right]$$

$$\left[B_2\right]={\left[\begin{array}{ccccccc}\frac{1}{L_1}& 0& 0& 0& 0& 0& 0\end{array}\right]}^T;\left[u\right]=V_{in};\left[C_2\right]=\left[\begin{array}{ccccccc}0& 0& 1& 0& 0& 1& 0\end{array}\right];\left[D_2\right]=\left[0\right]$$

During mode-III operation of the converter, the switch ‘S’ remains in the turned OFF condition. During this period the following state space model is derived.

(30) $$\left[\stackrel{•}{x}\right]=A_{3}x+B_{3}u;y=C_{3}x+D_{3}u$$

$\left[A_3\right]=\left[\begin{array}{ccccccc}0& 0& 0& -\frac{1}{L_1}& 0& 0& 0\\ 0& 0& 0& 0& \frac{1}{L_2}& -\frac{1}{L_2}& 0\\ \frac{1}{(C_1+C_2)}& 0& -\frac{1}{R_0(C_1+C_2)}& 0& 0& -\frac{1}{R_0(C_1+C_2)}& 0\\ \frac{1}{(C_1+C_2)}& 0& -\frac{1}{R_0(C_1+C_2)}& 0& 0& -\frac{1}{R_0(C_1+C_2)}& 0\\ 0& \frac{1}{(C_3+C_5)}& 0& 0& 0& 0& 0\\ 0& \frac{1}{C_4}& -\frac{1}{R_0{C}_4}& 0& 0& -\frac{1}{R_0{C}_4}& 0\\ 0& \frac{1}{(C_3+C_5)}& 0& 0& 0& 0& 0\end{array}\right]$

$$\left[B_3\right]={\left[\begin{array}{ccccccc}\frac{1}{L_1}& 0& 0& 0& 0& 0& 0\end{array}\right]}^T;\left[u\right]=V_{in};\left[C_3\right]=\left[\begin{array}{ccccccc}0& 0& 1& 0& 0& 1& 0\end{array}\right];\left[D_3\right]=\left[0\right]$$

The state equations derived above during ON period and OFF period of the switch are combined to obtain the following state space averaging model for the proposed hybrid single-switch DC-DC converter.

(31) $$\left[\stackrel{•}{x}\right]=Ax+Bu;y=Cx+Du$$

Where, $$\left[A\right]=A_{1}k+(A_2+A_3)(1-k)$$; $$\left[B\right]=B_{1}k+(B_2+B_3)(1-k)$$;

$$\left[C\right]=C_{1}k+(C_2+C_3)(1-k)$$; $$\left[D\right]=D_{1}k+(D_2+D_3)(1-k)$$

$\left[A\right]=\left[\begin{array}{ccccccc}0& 0& 0& -\frac{2(1-k)}{L_1}& 0& 0& 0\\ 0& 0& 0& \frac{k}{L_2}& \frac{2(1-k)}{L_2}& -\frac{(2-k)}{L_2}& -\frac{k}{L_2}\\ \frac{1-k}{(C_1+C_2)}& 0& -\frac{1}{R_0}\left(\frac{1}{C_1}+\frac{1-k}{C_1+C_2}\right)& 0& 0& -\frac{1}{R_0}\left(\frac{1}{C_1}+\frac{1-k}{C_1+C_2}\right)& 0\\ (1-k)\left(\frac{1}{C_2}+\frac{1}{C_1+C_2}\right)& -\frac{k}{C_2-C_3}& -\frac{(1-k)}{R_0(C_1+C_2)}& 0& 0& -\frac{(1-k)}{R_0(C_1+C_2)}& 0\\ 0& -\frac{k}{(C_2-C_3)}+\frac{2(1-k)}{(C_3+C_5)}& 0& 0& 0& 0& 0\\ 0& \frac{(2-k)}{C_4}& -\frac{(2-k)}{R_0{C}_4}& 0& 0& -\frac{(2-k)}{R_0{C}_4}& 0\\ 0& \frac{2(1-k)}{(C_3+C_5)}+\frac{k}{C_5}& 0& 0& 0& 0& 0\end{array}\right]$

$$\left[B\right]={\left[\begin{array}{ccccccc}\frac{(2-k)}{L_1}& 0& 0& 0& 0& 0& 0\end{array}\right]}^T$$; $$\left[C\right]=\left[\begin{array}{ccccccc}0& 0& (2-k)& 0& 0& (2-k)& 0\end{array}\right]$$; $$\left[D\right]=\left[0\right]$$

DESIGN OF CIRCUIT COMPONENTS

The power switch ‘S’ and the diodes D₁, D₂, D₃, and D₄ are assumed to be ideal semiconductor devices. The inductors (L₁ and L₂) and capacitors (C₁, C₂, C_3, C₄, and C₅) of the proposed hybrid converter are designed for maximum values as the power switch ‘S’ has to support both the converter voltage and current.

Design of inductors and capacitors:

Assume that the input current ripple (∆i_L1) is 20% of input current (i_L1) and the output current ripple (∆i_L2) is 15% of load current (I₀). The duty ratio (k) of the power switch is 0.8. The switching frequency (f_s) is 10 kHz. The input voltage (V_in) is 24 V. The values of all inductors and capacitors used in the proposed converter are calculated as per the following expressions:

$$L_1=\frac{V_{in}k}{f_s\Delta i_{L1}}=\frac{24\times 0.8}{10\times {10}^3\times \left(\frac{320}{24}\right)\times 0.2}=0.72\text{mH}$$

$$L_2=\frac{V_{in}k}{f_s\Delta i_{L2}}=\frac{0.8\times 24}{10\times {10}^3\times \left(\frac{320}{335}\right)\times 0.15}=13.4\text{mH}$$

As the inductor values L₁ and L₂ are calculated as 0.72 mH and 13.4 mH respectively, it is assumed that an optimum value of 1 mH is selected for each of the inductors in the simulation study of the converter.

$$C_1=\frac{V_{0}k}{R_0{f}_s\Delta V_{C1}}=\frac{335\times 0.8}{320\times 10\times {10}^3\times 1.2}=70\mu F$$

$$\Delta V_{C1}=\Delta V_{C2}=\Delta V_{C3}=\Delta V_{C5}=1\%$$ of $$V_{C1}$$ = $$\frac{1\times V_{in}}{100(1-k)}=\frac{24}{100\times 0.2}=1.2V$$

The values of all the capacitors C₁, C₂, C₃, & C₅ are assumed as 80 µF each in the simulation study based on the above calculated value in order to have very low ripples in the capacitor voltages. Further, it is assumed that the capacitors C₁, C₂, C₃, & C₅ each have 1% voltage ripple. The value of capacitor C₄ is calculated as 0.8 µF as per the following formula in order to have low voltage ripple [²²]. In the simulation study, its value is assumed as 1 µF.

$$C_4=\frac{\Delta i_{L2}}{8f_s\Delta V_{C4}}=\frac{\left(\frac{320}{335}\right)\times 0.15}{8\times 10\times {10}^3\times 2.16}=0.8\mu F$$

$$\Delta V_{C4}=1\%$$ of $$V_{C4}$$ = $$\frac{1\times (1+k)V_{in}}{100(1-k)}=\frac{1.8\times 24}{100\times 0.2}=2.16V$$

SIMULATION RESULTS AND DISCUSSION

The MATLAB / SIMULINK model of the proposed continuous input current hybrid single switch DC-DC converter structure as shown in Figure 5 is developed and simulated using variable-step type solver ‘ode 45’. The switching frequency (f_s) of the converter is chosen as 10 kHz. The values of circuit parameters used for simulation are listed in Table I. The MOSFET switch S is triggered into conduction by a pulse width modulated gating pulse as shown in Figure 3. The range of variation of duty ratio ‘D’ of the MOSFET switch is taken as 0.5 < D < 0.9. Here, the simulation of the converter has been carried out with D = 0.8. A load of 320 W capacity with 320 Ω resistance is connected at the output of the converter. For simulation purpose, an input DC voltage (V_in) of magnitude 24 V is taken from a battery source as shown in Figure 6. The input current (I_in) waveform with steady state value of around 15 A is shown in Figure 7. The observation of output voltage (V₀) and output current (I₀) waveforms shown in Figure 8 and Figure 9 indicates that the approximate steady state values of V₀ = 335 V and I₀ = 1 A are reached after a small settling time of around 0.04 s. This output DC voltage (V₀) is 14 times the input DC voltage (V_in). The voltage and current waveforms for the two identical inductors L₁ and L₂ are shown in Figure 10, Figure 11, Figure 12, and Figure 13 respectively. The waveforms of voltage and current for the MOSFET switch are shown in Figure 14 and Figure 15 respectively which demonstrate that the switch S is subjected to low voltage and current stress. The voltage and current waveforms depicted in Figures 16 to Figure 23 for the four diodes D₁, D₂, D₃, and D₄ indicate that the diodes too have low voltage-current stress. The voltage appearing across the capacitor C₁ (V_C1) is shown in Figure 24. According to the modes of operation of the converter, the capacitors C₁, C₂, C₃, and C₅ have the same steady state voltage magnitude (V_C1) of approximately 120 V appearing across each of them as shown in Figure 24. However, the capacitor C₄ has the steady state voltage magnitude (V_C4) of approximately 215 V appearing across it as illustrated in Figure 25. The waveforms of the currents through the capacitors C₁, C₂, C₃, C₄ and C₅ are shown in Figures 26 to Figure 30 respectively. The converter efficiency (η_c) is found to be 93% as calculated below:

$${\eta }_c=\frac{P_0}{P_{in}}\times 100=\frac{V_0{I}_0}{V_{in}{I}_{in}}\times 100=\frac{335\times 1}{24\times 15}\times 100=93\%$$

Figure 5
MATLAB / SIMULINK model of the proposed hybrid single switch DC-DC converter

Table 1
Parameters used for the simulation of the proposed hybrid DC-DC converter

Parameters	Symbol	Value
Input voltage	Vin	24 V (DC)
	V0	335 V (DC)
Output voltage Inductors	L1, L2	1 mH each
Capacitors	C1, C2, C3, C5	80 µF each
Capacitor	C4	1 µF
Switching frequency	fs	10 kHz
Load resistance	R0	320 Ω
Load power	P0	320 W
Average output current	I0	1 A
Duty ratio of the switch	D	0.8

Figure 6
Input DC voltage (V_in)

Figure 7
Input DC current (I_in)

Figure 8
Output DC voltage (V₀)

Figure 9
Output DC current (I₀)

Figure 10
Voltage across inductor L₁ (V_L1)

Figure 11
Current through inductor L₁ (I_L1)

Figure 12
Voltage across inductor L₂ (V_L2)

Figure 13
Current through inductor L₂ (I_L2)

Figure 14
Voltage across switch ‘S’ (V_S)

Figure 15
Current through switch ‘S’ (I_S)

Figure 16
Voltage across diode D₁ (V_D1)

Figure 17
Current through diode D₁ (I_D1)

Figure 18
Voltage across diode D₂ (V_D2)

Figure 19
Current through diode D₂ (I_D2)

Figure 20
Voltage across diode D₃ (V_D3)

Figure 21
Current through diode D₃ (I_D3)

Figure 22
Voltage across diode D₄ (V_D4)

Figure 23
Current through diode D₄ (I_D4)

Figure 24
Voltage across capacitor C₁ (V_C1 = V_C2 = V_C3 = -V_C5)

Figure 25
Voltage across capacitor C₄ (V_C4)

Figure 26
Current through capacitor C₁ (I_C1)

Figure 27
Current through capacitor C₂ (I_C2)

Figure 28
Current through capacitor C₃ (I_C3)

Figure 29
Current through capacitor C₄ (I_C4)

Figure 30
Current through capacitor C₅ (I_C5)

CONCLUSION

In this paper, the steady state behavior of a non-isolated hybrid single-switch high step-up positive output DC-DC converter operating in continuous inductor current mode has been explored. The proposed hybrid topology is the integrated structures of conventional boost converter and modified CUK converter. The performance of the converter is validated through MATLAB / SIMULINK study. The waveforms of voltage and current for the power switch, diodes, inductors, capacitors, and load are presented and analyzed for the converter with power switch duty ratio D = 0.8. The simulation results prove the effectiveness of the proposed hybrid single-switch topology in improving the static voltage gain by (2+D) times that of the traditional boost converter. The power conversion efficiency of the converter is calculated as 93%. The voltage-current stress on the single power switch and the diodes is found to be low. Moreover, only few oscillations are observed on the output voltage and current waveforms before they settle down to steady state. The filter capacitors C₁ and C₄ are so selected that the percentage of ripples present in the output voltage and output current is very low. The state space averaging model of the proposed hybrid converter is also detailed. The proposed hybrid single-switch DC-DC converter configuration is more suitable for renewable energy applications requiring improved voltage gain and high power conversion efficiency.

Acknowledgments:

The author acknowledges the technical support provided by the Department of Electrical and Electronics Engineering, Government College of Engineering, Salem, in carrying out the simulation work on the proposed converter.

• Funding: This research received no external funding.

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Editor-in-Chief: Bill Jorge Costa

Associate Editor: Daniel Navarro Gevers

Publication Dates

• Publication in this collection
  14 Apr 2023
• Date of issue
  2023

History

• Received
  13 Feb 2022
• Accepted
  24 Jan 2023